Technical specifications
- Manufacturer
- Microchip
- MCU / Part
- ATmega328P
- Architecture
- 8-bit AVR
- Logic voltage
- 1.8–5.5 V speed dependent
- Recommended input
- Regulated VCC/AVCC
- GPIO limits
- Observe per-pin, per-port and total current limits
- Flash
- 32 KB
- RAM
- 2 KB
- Clock
- Up to 20 MHz
- ADC
- 8-channel 10-bit (package dependent)
- DAC
- None
- PWM / timers
- 6 PWM outputs via timers
- Connectivity / buses
- USART, SPI, I²C/TWI
- Programmer
- ISP, high-voltage parallel programmer
- Debugger
- debugWIRE / Atmel-ICE
Pin reference
| Pin | Type | Main functions | Electrical note |
|---|
| RESET/PC6 | Reset | Active-low reset | Pull-up recommended |
| PB3/PB4/PB5 | SPI | MOSI/MISO/SCK | Also ISP pins |
| PC4/PC5 | I²C/TWI | SDA/SCL | Pull-ups required |
| PD0/PD1 | UART | RX/TX | VCC logic level |
| ADC0–ADC7 | Analog | ADC inputs | Do not exceed VREF/VCC |
| VCC/AVCC/GND/AREF | Power/reference | Digital/analog supply | Decouple and connect AVCC |
Features and compatibility
EEPROM, timers, watchdog, analog comparator
Verify the exact board revision and manufacturer documentation before wiring. Never apply 5 V to a 3.3 V-only GPIO.
Open official datasheet/documentation ↗Deep reference
Architecture, electrical limits and engineering guidance
- Exact MCU / SoC
- ATmega328P
- Maximum GPIO current
- Observe per-pin, per-port and total current limits
- EEPROM / NVM
- On-chip EEPROM is available; endurance and page-write limits apply.
- Interrupts / DMA
- GPIO/peripheral interrupts are available. DMA capability is device-specific; confirm channels, request mapping and memory-access restrictions in the reference manual.
- Sleep and power
- Use the light/deep/standby modes offered by the device. Measure board current because regulators, LEDs and USB interfaces can dominate MCU sleep current.
- Boot and programming
- Confirm boot-mode pins before reset. Use the official bootloader/programmer and retain a recoverable debug/programming header.
Special and restricted pins
Reset, clock, debug, USB, crystal and analogue-reference pins have special electrical or boot functions. Avoid loading them until the boot sequence is understood.
Boot-strapping warnings
Check BOOT/RESET/programming pin truth tables before assigning peripherals; keep required pull resistors fitted.
I/O voltage warnings
1.8–5.5 V speed dependent domain. Never exceed VDD + permitted injection limits; level-shift incompatible modules and share ground only where safe.
Memory map and registers
Start with the memory map: code flash, SRAM, peripheral registers and system/control space. Use vendor headers instead of hard-coded addresses, then study GPIO direction/output/input, clock-enable, interrupt and timer registers.
Board-selection guidance
Choose this device only after checking logic voltage, required interfaces, memory margin, timers/ADC resolution, debugging access, package availability and long-term tool support.
Common faults and troubleshooting
Not detected: verify data USB cable, driver, boot mode and target power. Upload failure: select the exact target and programmer. Unstable operation: inspect supply ripple, reset, clock and watchdog cause. Wrong readings: check reference voltage, grounding, pin multiplexing and calibration.
Interview and viva questions
What is the difference between an absolute maximum and an operating limit?
Absolute maximum prevents damage; reliable design stays within recommended operating conditions.
Why must peripheral clocks be enabled?
Many MCUs gate clocks to save power; registers may not operate until the peripheral clock is enabled.
Why preserve a debug interface?
It enables programming, breakpoints, fault inspection and production recovery.
What causes GPIO damage?
Over-voltage, excess source/sink current, negative injection, ESD or driving against another output.
