Technical specifications
- Manufacturer
- WCH / board vendor
- MCU / Part
- CH32V003
- Architecture
- QingKe 32-bit RISC-V
- Logic voltage
- 2.7–5.5 V device family; board dependent
- Recommended input
- Regulated VDD / board input
- GPIO limits
- VDD-relative; observe absolute and current limits
- Flash
- 16 KB
- RAM
- 2 KB
- Clock
- Up to 48 MHz
- ADC
- 10-bit ADC
- DAC
- None
- PWM / timers
- General/advanced timers
- Connectivity / buses
- UART, I²C, SPI
- Programmer
- WCH-LinkE single-wire debug interface
- Debugger
- WCH-LinkE
Pin reference
| Pin | Type | Main functions | Electrical note |
|---|
| PD1/SWIO | Debug/GPIO | Single-wire debug interface | Keep accessible |
| PA/PB/PC/PD | GPIO/Peripheral | ADC/timer/UART/SPI/I²C mux | VDD logic domain |
| NRST | Reset | Active-low reset | Follow reference circuit |
| VDD/VSS | Power | Device supply/ground | Decouple close to device |
Features and compatibility
Low cost, RISC-V, timers, ADC
Verify the exact board revision and manufacturer documentation before wiring. Never apply 5 V to a 3.3 V-only GPIO.
Open official datasheet/documentation ↗Deep reference
Architecture, electrical limits and engineering guidance
- Exact MCU / SoC
- CH32V003
- Maximum GPIO current
- VDD-relative; observe absolute and current limits
- EEPROM / NVM
- Use internal data flash/NVS/flash emulation where supported; include wear levelling and power-fail protection.
- Interrupts / DMA
- GPIO/peripheral interrupts are available. DMA capability is device-specific; confirm channels, request mapping and memory-access restrictions in the reference manual.
- Sleep and power
- Use the light/deep/standby modes offered by the device. Measure board current because regulators, LEDs and USB interfaces can dominate MCU sleep current.
- Boot and programming
- Confirm boot-mode pins before reset. Use the official bootloader/programmer and retain a recoverable debug/programming header.
Special and restricted pins
Reset, clock, debug, USB, crystal and analogue-reference pins have special electrical or boot functions. Avoid loading them until the boot sequence is understood.
Boot-strapping warnings
Check BOOT/RESET/programming pin truth tables before assigning peripherals; keep required pull resistors fitted.
I/O voltage warnings
2.7–5.5 V device family; board dependent domain. Never exceed VDD + permitted injection limits; level-shift incompatible modules and share ground only where safe.
Memory map and registers
Start with the memory map: code flash, SRAM, peripheral registers and system/control space. Use vendor headers instead of hard-coded addresses, then study GPIO direction/output/input, clock-enable, interrupt and timer registers.
Board-selection guidance
Choose this device only after checking logic voltage, required interfaces, memory margin, timers/ADC resolution, debugging access, package availability and long-term tool support.
Common faults and troubleshooting
Not detected: verify data USB cable, driver, boot mode and target power. Upload failure: select the exact target and programmer. Unstable operation: inspect supply ripple, reset, clock and watchdog cause. Wrong readings: check reference voltage, grounding, pin multiplexing and calibration.
Interview and viva questions
What is the difference between an absolute maximum and an operating limit?
Absolute maximum prevents damage; reliable design stays within recommended operating conditions.
Why must peripheral clocks be enabled?
Many MCUs gate clocks to save power; registers may not operate until the peripheral clock is enabled.
Why preserve a debug interface?
It enables programming, breakpoints, fault inspection and production recovery.
What causes GPIO damage?
Over-voltage, excess source/sink current, negative injection, ESD or driving against another output.
