TCS Pune

820-03286 – Bench Power & Signal Checklist

Board-specific bench checklist derived from supplied schematic source(s) for 820-03286 . Only signals located in the supplied schematic text were added automatically; missing thresholds or values remain technician-verified rather than guessed.

🔌 820-03286Expert⏱ 60-180 minutes📋 5 steps

Compatible models: X2203 / T585 reference platform

⚠ Safety: Disconnect battery before resistance/diode checks. Use current limiting for injection. Never inject voltage into an unknown rail until its safe voltage/current limit and isolation path are confirmed. Verify board/revision before using reference values.

🛠 Required Tools

  • Digital multimeter Oscilloscope with x10 probe Bench power supply with current limit Thermal camera / freeze spray as required SPI programmer where firmware diagnosis is required
0 / 5 done
Progress saved in browser.
Schematic-derived bench record

Bench Manual & Source Coverage

Source coverage: High. Values and thresholds must still be verified against the exact schematic/datasheet.

Source PDF(s): 820-03286.pdf

Board profile

Power & Control Architecture

Platform / ODMApple MLB
CPU / SoCApple SoC platform
PCH / ChipsetSoC integrated
MemoryUnified memory / SoC platform
EC / SIOSPMU / SMC
ChargerMandola charger reference
CPU VRIceman VR reference
BIOS / SPISoC QSPI flash
USB-C / PDApple USB-C port controller / Ace3 ecosystem
GPUSoC integrated
Table A

Chronological Power Sequence

Follow upstream to downstream. A missing later signal may simply be the result of an earlier missing prerequisite.

#StageSignal / RailFrom -> ToRefStateExpectedDMMOscilloscope
1DC InputAdapter / DC-IN main railInput connector / protection pathSchematic p.34Follow chronological sequenceBoard-specific adapter/input voltage; verify source/PD contract and schematic.Measure DC to ground at the adapter/input protection path.Flat DC; investigate collapse or excessive ripple.
2EC / SMC32.768 kHz RTC / EC clockRTC / EC low-frequency clockSchematic p.45Follow chronological sequenceStable low-frequency oscillation where the board exposes/measures it.Oscilloscope with high-impedance probe; avoid loading crystal nodes.~32.768 kHz waveform when applicable.
3MemoryMemory VDD / VDDQMemory powerSchematic p.3Follow chronological sequenceNominal board-specific memory rail voltage for installed memory generation.Measure rail voltage at memory coil/capacitors.Stable DC with normal ramp.
4BIOS / SPIBIOS / SPI flash supplySPI flash supplySchematic p.117Follow chronological sequenceUse exact flash marking/datasheet; commonly 1.8 V or 3.3 V but never assume.Identify exact flash device first, then measure VCC.Stable DC.
5BIOS / SPISPI chip-selectController -> SPI flashSchematic p.3Follow chronological sequenceIdle/inactive with access pulses when firmware is being read.Oscilloscope during power-on/reset release.Chip-select pulse bursts.
6BIOS / SPISPI clockController -> SPI flashSchematic p.3Follow chronological sequenceClock bursts during flash access.Oscilloscope during firmware access.High-frequency clock bursts.
7DisplayLCD / eDP panel powerPanel power switch -> connectorSchematic p.82Follow chronological sequenceBoard-specific panel logic supply as shown in schematic.Measure at panel connector/fuse/load switch.Stable DC after panel enable.
8DisplayBacklight PWMEC/PCH/GPU -> backlight controllerSchematic p.91Follow chronological sequencePWM activity when brightness is nonzero; exact frequency/duty is platform specific.Use oscilloscope; measure duty/frequency.Stable PWM waveform.
9USB-C / PDUSB-C CC1 / CC2USB-C port -> PD controllerSchematic p.32Follow chronological sequenceValid CC attachment/orientation state; exact voltage depends on source/sink role and Rp/Rd.Measure CC states according to Type-C/PD controller datasheet and port orientation.Observe attach/orientation changes.
10USB-C / PDPD negotiation / contractUSB-C PD controllerSchematic p.3Follow chronological sequenceContract may be 5/9/15/20 V or PPS depending platform/source; do not assume 20 V.Verify 5 V default VBUS first, then observe negotiation and final contract.PD communication / VBUS transition when negotiation succeeds.
Table B

Bench Reading & Fault Isolation

Enter the actual DMM reading and scope/logic observation. Select PASS, FAIL or N/A, then tick Checked when that row is complete.

0 / 10 checked
Checked#Signal / RailMeasuredObserved Waveform / LogicResultFailure Isolation HintTechnician Notes
1Adapter / DC-IN main railSchematic p.34No input: inspect adapter/port, fuse, protection MOSFETs and shorted PBUS/system rail.
Additional readings
Technician evidence
232.768 kHz RTC / EC clockSchematic p.45Absent clock: verify oscillator supply, crystal network and controller state.
Additional readings
Technician evidence
3Memory VDD / VDDQSchematic p.3Missing/low: inspect memory VR enable, short/load and power-state prerequisite.
Additional readings
Technician evidence
4BIOS / SPI flash supplySchematic p.117Wrong/missing supply: inspect flash power switch/rail and shorts before programming.
Additional readings
Technician evidence
5SPI chip-selectSchematic p.3No activity: sequence may not have reached firmware fetch; verify upstream reset/clock/power first.
Additional readings
Technician evidence
6SPI clockSchematic p.3CS activity without clock suggests bus/controller issue; no bus activity may be upstream sequencing.
Additional readings
Technician evidence
7LCD / eDP panel powerSchematic p.82Missing: inspect panel enable, fuse/load switch, shorted cable/panel and upstream display prerequisites.
Additional readings
Technician evidence
8Backlight PWMSchematic p.91Missing PWM with enable present: inspect brightness control source and firmware/EC path.
Additional readings
Technician evidence
9USB-C CC1 / CC2Schematic p.32Abnormal state: inspect port, ESD/protection, pull networks and PD controller supply before IC replacement.
Additional readings
Technician evidence
10PD negotiation / contractSchematic p.3No contract: verify CC state, controller supply, dead-battery path, firmware and source/cable compatibility.
Additional readings
Technician evidence
V4.0 · BOARD COMPONENT INTELLIGENCE

Component Index

Select a board component to see its function, related rails/signals, enable and power-good dependencies, input/output path, matching checklist tests and identical fitted ICs found on other board checklists. Unknown values are left unknown rather than guessed.

V4.3 Bench PSU Current Profile

Board Current Sequence

Record current draw in amperes at each observable stage. Historical comparison uses successful repairs of this exact board checklist. A different reading is a clue, not a component diagnosis.

Current sequence: No readings yet
No successful-repair baseline yet
No successful-repair baseline yet
No successful-repair baseline yet
No successful-repair baseline yet
No successful-repair baseline yet
No successful-repair baseline yet

Tip: enter only stages you actually observed. For boards that never reach a later stage, leave that stage blank rather than entering a guessed value.

V4.4 Board Knowledge

Previous Solved Cases

Historical cases are diagnostic references only. Confirm readings on the board in front of you before replacing parts.

Live match: Mark a bench signal FAIL to check previous solved cases for 820-03286.

No structured solved-repair knowledge has been collected for this board yet. New V4.4 solved cases will build it automatically.

V4.5 · SIMILAR BOARD / PLATFORM MATCHING

Reference Boards

Reference only: The boards below share one or more stored platform attributes with this motherboard. Their voltages, component locations, designators, sequence details and repair findings are not automatically treated as facts for the current board. Verify against the current board schematic, boardview and measurements before use.

Reference-board matches are discovery aids only. Missing information on this board is deliberately left unknown and is not filled from a similar board.

V4.9 Diagnostic Timeline

Repair Timeline

Bench actions are recorded in sequence for training, QC and future troubleshooting. Signal result changes remain in history even after a failed stage later passes.

    The final solved forum case receives the complete timeline for this bench session. Manual actions should describe what was actually done, not a suspected cause.

    GUIDED BIOS DIAGNOSTICS · V5.1

    BIOS / SPI Flash Diagnostic Record

    Record only measurements observed on this board. The workflow does not assume a flash voltage, logic level or firmware fault from a single reading.

    Original BIOS dump

    The first uploaded original is locked to this diagnostic session and cannot be overwritten by this workflow.

    Repaired BIOS dump

    Stored as a separate attachment. Uploading it never modifies the original dump.

    Final diagnostic decision

    Is the problem solved?

    Complete the applicable checklist and bench rows first. If solved, the completed diagnostic flow is converted into a resolved Repair Forum post automatically.

    V5.0 Repair Case Intelligence

    Board Repair Dashboard

    Aggregate repair patterns for 820-03286. Historical patterns are references, not proof of the current fault.

    0Recorded repairs
    0.0%Solved
    Not enough timeline dataAverage diagnosis time
    0Rework cases

    Common symptoms

    No structured data yet.

    Frequently failed rails / signals

    No structured data yet.

    Frequently replaced / repaired ICs

    No structured data yet.

    Common root causes

    No structured data yet.

    Diagnosis time is calculated from V4.9 timeline evidence when available. Only server-recorded board-linked repair cases are counted; unsaved local bench sessions are excluded. Technician performance is never exposed on this board dashboard.

    USB-C / PD DIAGNOSTICS · V5.2

    USB-C Power Delivery Diagnostic Record

    Record observed behavior on this board and adapter. Contract voltage and controller behavior vary by platform; this module does not assume that a higher-voltage PD contract must always be present.

    USB-C port fault checklist

    Check only what was actually inspected. A failed item is a diagnostic clue, not an automatic component diagnosis.

    DISPLAY / NO-DISPLAY DIAGNOSTICS · V5.3

    Internal & External Display Diagnostic Record

    Record board-specific observations. Missing display signals are clues only; expected voltage, polarity and timing must be verified from the schematic, panel specification or known-good board.

    Internal vs external display decision tree

    Complete the checks in order. The guidance below narrows the next area to inspect but does not declare a component faulty.

    Record the internal and external display results to show decision guidance.
    💰

    Estimated repair cost at TCS Pune

    ₹4,000 – ₹15,000

    Final price confirmed after free device inspection. Includes 6-month warranty.

    Get exact quote ↗
    Ready when you are

    Need help with your laptop or computer?

    Send us the model and fault details. Start your repair request online or contact TCS Pune directly.

    ☎